@inproceedings{R:Malik:2010,
author = {Malik, Abdul Haseeb and Wellings, Andy and Chang, Yang},
title = {A locality model for the real-time specification for Java},
booktitle = {JTRES '10: Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems},
year = {2010},
isbn = {978-1-4503-0122-0},
pages = {36--45},
location = {Prague, Czech Republic},
doi = {http://doi.acm.org/10.1145/1850771.1850776},
publisher = {ACM},
address = {New York, NY, USA},
abstract = {The memory architecture of non-uniform memory access (NUMA) systems cause applications to experience variable delays when accessing the main memory. The Real-Time Specification for Java assumes that all memory is uniformly accessed and provides limited support to control the allocation policies of threads and objects. As a result, programmers are unable to predict the behaviour of applications running on NUMA systems. This paper proposes a framework which gives visibility and more control to the programmers over the allocation policies of threads and objects on NUMA systems. A prototype implementation running on top of jRate and Linux has been evaluated on a 16 processor cc-NUMA platform by using the Sieve of Eratosthenes algorithm. Our initial results show that a 4 fold improvement in performance can be obtained by giving the programmer control over thread and object placement.}
}


@inproceedings{R:Wellings:2010d,
author = {Wellings, Andy and Kim, MinSeong},
title = {Asynchronous event handling and safety critical Java},
booktitle = {JTRES '10: Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems},
year = {2010},
isbn = {978-1-4503-0122-0},
pages = {53--62},
location = {Prague, Czech Republic},
doi = {http://doi.acm.org/10.1145/1850771.1850778},
publisher = {ACM},
address = {New York, NY, USA},
abstract = {Over the last few years, JSR 302 has been developing a subset of Java augmented by the RTSJ for use in safety critical systems. The concurrency model supported by Safety Critical Java (SCJ) relies, almost exclusively, on an event-based model rather than a thread-based model. This paper reviews the advantages and disadvantages of the two models and gives the pragmatic reasons why SCJ has adopted the former model. It argues that by basing the SCJ classes on the RTSJ's BoundAsyncEvent class, some inconsistencies exist between the SCJ and the RTSJ models. Furthermore, some of the optimization that are possible when mapping handlers to server threads are inhibited, even though the programming restrictions necessary for these optimization are imposed by the SCJ specification. A revised model is presented that has a slightly more complicated API but is more consistent with the RTSJ and does allow the optimizations. However, there is a resulting increase in the necessary run-time support, particularly for multiprocessor implementations.}
}


@techreport{R:Chang:2010,
author = {Y. Chang and R.I. Davis and A. Wellings},
title = {Improved Schedulability Analysis for Multiprocessor Systems with Resource Sharing},
institution = {University of York},
type = {techreport},
number = {YCS-2010-454},
year = {2010},
abstract = {This report presents our recent efforts to close the gap between the state-of-the-art homogeneous (or identical) multiprocessor and uniprocessor schedulability analyses in the context of resource sharing. Although many multiprocessor resource sharing protocols have been proposed, their impact on the schedulability of real-time tasks is largely ignored in most existing literature. Recently, work has been done to integrate queue locks (FIFO-queue-based non-preemptive spin locks) with multiprocessor schedulability analysis but the techniques used introduce a substantial amount of pessimism, some of which, as explained in this report, can be easily eliminated. For global fixed task priority preemptive multiprocessor systems, this pessimism impacts low priority tasks, greatly reducing the number of tasksets that can be recognised as schedulable. We develop a new schedulability analysis \emph{lp-CDW} to target this issue specifically. By combing \emph{lp-CDW} with existing techniques, we significantly increase the number of tasksets that can be recognised as schedulable.}
}


@techreport{R:Davis:2009d,
author = {R.I. Davis and A. Burns},
title = {A Survey of Hard Real-Time Scheduling Algorithms and Schedulability Analysis Techniques for Multiprocessor Systems},
institution = {University of York, Department of Computer Science},
year = {2009},
type = {techreport},
number = {YCS-2009-443},
abstract = {This survey covers hard real-time scheduling algorithms and schedulability analysis techniques for homogeneous multiprocessor systems. It reviews the key results in this field from its origins in the late 1960's to the latest research published in late 2009. The survey outlines fundamental results about multiprocessor real-time scheduling that hold independent of the scheduling algorithms employed. It provides a taxonomy of the different scheduling methods, and considers the various performance metrics that can be used for comparison purposes. A detailed review is provided covering partitioned, global, and hybrid scheduling algorithms, approaches to resource sharing, and the latest results from empirical investigations. The survey identifies open issues, key research challenges and likely productive research directions.}
}


@inproceedings{R:Whitham:2009a,
title = {{Using Hardware Methods to Improve Time-predictable Performance in Real-time Java Systems}},
booktitle = {Proc. JTRES},
author = {Jack Whitham and Neil Audsley and Martin Schoeberl},
pages = {130--139},
year = {2009},
abstract = {This paper describes hardware methods, a lightweight and platform-independent scheme for linking real-time Java code to co-processors implemented using a hardware description language (HDL). Intended for use in embedded systems, hardware methods have similar semantics to the native methods used to interface Java code to legacy C/C++ software, but are also time-predictable, facilitating accurate worst-case execution time (WCET) analysis. By reference to several examples, the paper demonstrates the applicability of hardware methods and shows that they can (1) reduce the WCET of embedded real-time Java, and (2) improve the quality of WCET estimates in the presence of infeasible paths.}
}


@inproceedings{R:Wellings:2009,
author = {A.J. Wellings and Y. Chang and T. Richardson},
title = {Enhancing the platform independence of the real-time specification for Java},
booktitle = {Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems},
year = {2009},
editor = {},
series = {ACM International Conference Proceeding Series},
pages = {61-69},
address = {New York, NY, USA},
publisher = {ACM},
abstract = {The Real-Time Specification for Java (RTSJ) extends Java's support for platform-independence into the realms of real-time systems. It supports an environment that facilitates on-line feasibility analysis. However, an RTSJ program is normally run on an execution platform that might be shared with other (possibly non Java) applications. This paper explores how the notion of service contracts can be used to enhance the platform-independence of RTSJ applications. It also considers the role of real-time application components within an RTSJ environment.}
}


@article{R:R.I.Davis:2009,
author = {R.I.Davis and A.Burns},
title = {Priority Assignment for Global Fixed Priority Pre-emptive Scheduling in Multiprocessor Real-Time Systems},
journal = {Real-Time Systems Symposium (RTSS)},
year = {2009},
pages = {398--409},
month = {Dec},
abstract = {This paper addresses the problem of priority assignment in multiprocessor real-time systems using global fixed task-priority pre-emptive scheduling. In this paper, we prove that Audsley's Optimal Priority Assignment (OPA) algorithm, originally devised for uniprocessor scheduling, is applicable to the multiprocessor case, provided that three conditions hold with respect to the schedulability tests used. Our empirical investigations show that the combination of optimal priority assignment policy and a simple compatible schedulability test is highly effective, in terms of the number of tasksets deemed to be schedulable. We also examine the performance of heuristic priority assignment policies such as Deadline Monotonic, and an extension of the TkC priority assignment policy called DkC that can be used with any schedulability test. Here we find that Deadline Monotonic priority assignment has relatively poor performance in the multiprocessor case, while DkC priority assignment is highly effective.}
}


@inproceedings{R:Whitham:2010a,
title = {{Investigating average versus worst-case timing behavior of data caches and data scratchpads}},
booktitle = {Proc. ECRTS},
author = {Jack Whitham and Neil Audsley},
year = {2010},
pages = {165--174},
abstract = {This paper shows that a program using a time predictable memory system for data storage can achieve a similar worst-case execution time (WCET) to the average-case execution time (ACET) using a conventional heuristic-based memory system including a data cache. This result is useful within any embedded system where time-predictability and performance are both important, particularly hard real-time systems carrying out intensive data processing activities. It is a counter-example to the conventional wisdom that time-predictable means “slow” in comparison to ACET-focused heuristics. To carry out the investigation, 36 “memory access models” are derived from benchmark programs and assumed to be representative of typical code. The models generate LOAD/STORE instructions to exercise a data cache or scratchpad memory management unit (SMMU). The ACET is determined for the data cache and the WCET is determined for the SMMU. After improvements are applied, results show that the SMMU WCET is within 5% of the data cache ACET for 34 models. In 16 of 36 cases, the SMMU WCET is better than the data cache ACET.}
}


@inproceedings{R:Whitham:2010,
title = {{Studying the Applicability of the Scratchpad Memory Management Unit}},
booktitle = {Proc. RTAS},
author = {Jack Whitham and Neil Audsley},
pages = {205--214},
year = {2010},
abstract = {A combination of a scratchpad and scratchpad memory management unit (SMMU) has been proposed as a way to implement fast and time-predictable memory access operations in programs that use dynamic data structures. A memory access operation is time-predictable if its execution time is known or bounded -- this is important within a hard real-time task so that the worst-case execution time (WCET) can be determined. However, the requirement for time-predictability does not remove the conventional requirement for efficiency: operations must be serviced as quickly as possible under worst-case conditions. This paper studies the capabilities of the SMMU when applied to a number of benchmark programs. A new allocation algorithm is proposed to dynamically manage the scratchpad space. In many cases, the SMMU vastly reduces the number of accesses to dynamic data structures stored in external memory along the worst-case execution path (WCEP). Across all the benchmarks, an average of 47% of accesses are rerouted to scratchpad, with nearly 100% for some programs. In previous scratchpad-based work, time-predictability could only be assured for these operations using external memory. The paper also examines situations in which the SMMU does not perform so well, and discusses how these could be addressed.}
}


@inproceedings{R:Whitham:2009b,
title = {{Implementing Time-predictable Load and Store Operations}},
booktitle = {Proc. EMSOFT},
author = {Jack Whitham and Neil Audsley},
year = {2009},
pages = {265--274},
abstract = {Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages of scratchpads include reduced energy consumption in comparison to a cache and access latencies that are independent of the preceding memory access pattern. The latter property makes memory accesses time-predictable, which is useful for hard real-time tasks as the worst-case execution time (WCET) must be safely estimated in order to check that the system will meet timing requirements. However, data must be explicitly moved between scratchpad and external memory as a task executes in order to make best use of the limited scratchpad space. When dynamic data is moved, issues such as pointer aliasing and pointer invalidation become problematic. Previous work has proposed solutions that are not suitable for hard real-time tasks because memory accesses are not time-predictable. This paper proposes the scratchpad memory management unit (SMMU) as an enhancement to scratchpad technology. The SMMU implements an alternative solution to the pointer aliasing and pointer invalidation problems which (1) does not require whole-program pointer analysis and (2) makes every memory access operation time-predictable. This allows WCET analysis to be applied to hard-real time tasks which use a scratchpad and dynamic data, but results are also applicable in the wider context of minimizing energy consumption or average execution time. Experiments using C software show that the combination of an SMMU and scratchpad compares favorably with the best and worst case performance of a conventional data cache.}
}


@inproceedings{szeder09padtad,
        author = {Szeder, G\'{a}bor},
        title = {Unit Testing for Multi-Threaded Java Programs},
        booktitle = {PADTAD '09: Proceedings of the 7th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging},
        year = {2009},
        isbn = {978-1-60558-655-7},
        pages = {1--8},
        location = {Chicago, Illinois},
        doi = {http://doi.acm.org/10.1145/1639622.1639626},
        publisher = {ACM},
        address = {New York, NY, USA},
}